Icl8038 Linear Sweep Function Generator Cct 6e5750

Linear Sweep Function Generator

This basic VCO/waveform generator IC circuit includes a voltage follower loop (formed with IC1) and symmetry loop (IC3) to eliminate an asymmetric duty cycle, which would cause distortion at low frequencies. This design describes a “symmetry loop” that maximizes the linear sweep range of a voltagecontrolled oscillator (VCO). The ICL8038 provides sine, square, and triangular waveforms simultaneously over a 1000:1 frequency range. However, this range has been impossible to achieve without an asymmetric duty cycle and, therefore, higher distortion at lower frequencies. The symmetry loop maintains the duty cycle close to 50% over a frequency sweep of greater than 1000:1, providing a sine wave with low distortion.

IC2, the ICL8038, forms the core of the circuit. The control voltage, fed into pin 8, is buffered, and appears at pins 4 and 5 with little change:

The voltages across R2 and R3 control two current sources in such a way that capacitor C1 is charged continuously by the current through R2 and discharged, through a switch, by twice the current through R3, based on an internal flip-flop switched alternately when the voltage across C1 reaches one-third and twothirds of the supply voltage.

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Linear Sweep Function Generator The flip-flop signal is provided as an open-collector, square-wave output at pin 9. If R2 and R3 are equal, the linear charge and discharge of C1 by the equal currents produces a symmetric triangular waveform. Pin 3 is the buffered triangle waveform across C1, and pin 2 is the sinusoidal output of an internal triangle-to-sine shaping network. The internal current-source circuitry creates two problems when the control voltage at pin 8 approaches V+. First, because of the VBE mismatch between the internal npn/pnp transistors, the voltage across R2 and R3 is a minimum of 100 mV or more, limiting the lowest effective control voltage. Second, this V BE mismatch also causes a slight difference between the voltages across R2 and R3, which leads to a significant difference in current source currents at low control voltages. The difference manifests as duty-cycle variation and distortion of the output waveform. Two control loops were added to the circuit to reduce this variation and distortion. IC1 forms a simple voltage follower to maintain IC2’s pin 5 exactly at the control voltage, eliminating the internal V BE mismatch. The second symmetry loop is built around IC3. This loop integrates the inverted square-wave output at IC2’s pin 9 and feeds the integrated voltage as an additional control-voltage signal to pin 4. In operation, the current through R3 is modified in such a way that the square-wave duty cycle is maintained close to 50%, overriding the inherent VBE mismatch and slight difference between the voltages across R2 and R3. Transistor Q1 inverts the square-wave output so the overall negative- sense of the symmetry loop is maintained, and diode D1 compensates partially for the VCE saturation voltage of Q1 so the input to the integrator has an equal voltage swing. VR1 is used for initial distortion adjustment of the sine wave. The chart below shows measured results that illustrate the improvements over the basic circuit by the addition of the voltage follower and symmetry loops. The enhanced circuit achieves a wide frequency sweep of greater than 1000:1 with low distortion, even at low frequencies. The only limitation of this scheme is that the integrator time constant would affect the frequency response of any frequency modulation input fed at the control voltage, VIn.

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